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TSB711 数据表(PDF) 18 Page - STMicroelectronics

部件名 TSB711
功能描述  Precision rail-to-rail input / output 36 V, 6 MHz op-amps
PDF  36 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

TSB711 数据表(HTML) 18 Page - STMicroelectronics

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5.3
Rail-to-rail input stage
The TSB711, TSB711A, TSB712, TSB712A devices are built with two complementary NPN and PNP input
differential pairs, as shown in the figure below.
Figure 43. Rail-to-rail input stage
VCC
GND
[ … ]
[ … ]
[ … ]
[ … ]
In
Ip
Nn
Np
VIN
VIP
Pn
Pp
The devices have rail-to-rail inputs, and the input common mode range is extended from VCC- to (VCC+) + 0.1
V. However, the performance of these devices is optimized for the P-channel differential pair (which means
from VCC- to (VCC+) - 1.5 V). Around (VCC+) – 1 V, and with slight variations depending on the process, a
transition occurs between the P-channel and the N-channel differential pair, impacting the input offset voltage (see
Figure 12. Input offset voltage vs. common mode voltage at VCC = 5 V TSB711A, TSB712A and Figure 13. Input
offset voltage vs. common mode voltage at VCC = 36 V TSB711A, TSB712A). As a consequence, CMRR can
be degraded around this transition region. In order to achieve the best possible performance, this operating point
should be avoided.
Please also notice that the input bias current polarity depends on the operation of NPN or PNP input stage.
This transition is visible in figures Figure 16. Input bias current vs. common mode voltage at VCC = 5 V and
Figure 17. Input bias current vs. common mode voltage at VCC = 36 V.
5.4
Input offset voltage drift over the temperature
The maximum input voltage drift variation over temperature is defined as the offset variation related to the offset
value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain,
and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C
can be compensated during the production at application level. The maximum input voltage drift overtemperature
enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift
overtemperature is computed using the following formula:
ΔVioΔT=maxVioT−Vio25°C
T−25°C T=−40°CandT=125°C
(1)
The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk
(process capability index) greater than 1.3.
TSB711, TSB711A, TSB712, TSB712A, TSB714, TSB714A
Rail-to-rail input stage
DS12487 - Rev 6
page 18/36



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