SN74HCS595 8-Bit Shift Register With Schmitt-Trigger Inputs and 3-State Output

Registers

1 Features

• Wide operating voltage range: 2 V to 6 V

• Schmitt-trigger inputs allow for slow or noisy input

signals

• Low power consumption

– Typical input leakage current of ±100 nA

• ±7.8-mA output drive at 6 V

• Extended ambient temperature range: –40°C to

2 Applications

• Output expansion

• LED matrix control

• 7-segment display control

• 8-bit data storage

3 Description

The SN74HCS595 device contains an 8-bit, serial-

in, parallel-out shift register that feeds an 8-bit

D-type storage register. All inputs include Schmitt-

trigger architecture, eliminating any erroneous data

outputs due to slow-edged or noisy input signals. The

storage register has parallel 3-state outputs. Separate

clocks are provided for both the shift and storage

register. The shift register has a direct overriding clear

(SRCLR) input, serial (SER) input, and a serial output

input is high, the storage register outputs are in a

high-impedance state. Internal register data and serial

OE input.

Device Information

PART NUMBER

PACKAGE(1)

BODY SIZE (NOM)

SN74HCS595PW

TSSOP (16) 5.00 mm x 4.40 mm

SN74HCS595D

SOIC (16)

9.90 mm x 3.90 mm

SN74HCS595BQB

WQFN (16)

3.60 mm x 2.60 mm

SN74HCS595DYY

SOT-23-THN

(16)

4.20 mm x 2.00 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

Input Voltage

Schmitt-trigger

CMOS Input

Response

Waveforms

Standard

CMOS Input

Response

Waveforms

Input Voltage

Input Voltage

Time

Time

Input Voltage

Waveforms

Low Power

Noise Rejection

Supports Slow Inputs

Time

Time

Time

Time

Benefits of Schmitt-trigger inputs

SN74HCS595

SCLS803B – OCTOBER 2020 – REVISED MAY 2021

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.