P01xxxL

3/7

Figure

3:

Relative

variation

of

thermal

impedance junction to ambient versus pulse

duration

Figure 4: Relative variation of gate trigger

current, holding current and latching current

versus junction temperature (typical values)

Figure 5: Relative variation of holding current

versus

gate-cathode

resistance

(typical

values)

Figure 6: Relative variation of dV/dt immunity

versus

gate-cathode

resistance

(typical

values)

Figure 7: Relative variation of dV/dt immunity

versus

gate-cathode

capacitance

(typical

values)

Figure 8: Surge peak on-state current versus

number of cycles

1E-2

1E-1

1E+0

1E+1

1E+2

0.01

0.10

1.00

K=[Z

/R

th(j-a)

t (s)

p

-40

-20

0

20

40

60

80

100

120

140

0

1

2

3

4

5

6

T (°C)

j

I,I ,I [T ] /

GT H L

j

I

,I ,I [T =25°C]

GT H L

j

R= 1k

L

GK

Ω

1E-2

1E-1

1E+0

1E+1

0

2

4

6

8

10

12

14

16

18

20

R(k )

GK

Ω

I [R

] / I [

=1k ]

HGK

H

Ω

0

200

400

600

800

1000

1200

1400

1600

1800

2000

0.1

1.0

10.0

R(k )

GK

Ω

dV/dt[R

] / dV/dt[

=1k ]

GK

Ω

V = 0.67 x V

D

DRM

0123

4567

0

2

4

6

8

10

C

(nF)

GK

dV/dt[C

] / dV/dt[

=1k ]

GK

Ω

T

V = 0.67 x V

= 125°C

R= 1k

D

DRM

GK

j

Ω

1

10

100

1000

0

1

2

3

4

5

6

7

I

(A)

TSM

Number of cycles

Non repetitive

T initial=25°C

j

Repetitive

T

=25°C

amb

t =10ms

p

One cycle