R7I4DECT-1-DAC32C-R datasheet(6/9 Pages) MSYSTEM

6 / 9 page

MODEL: R7I4DECT-1-DAC32C

R7I4DECT-1-DAC32C SPECIFICATIONS

ES-7779-C Rev.0 Page 6/9

http://www.m-system.co.jp/

RESPONSE TIME

• Input module

Response time is time from when a step (0 to 100%) input signal is applied to the input module (slave) until when output from

its communication CPU reaches 90% of the final value.

• Output module

Response time is time from when a step (0 to 100%) output signal is received by the communication CPU of the output module

(slave) until when its output reaches 90% of the final value.

TCOM: EtherCAT communication cycle set by the host device (master)

(The cycle is determined in accordance with the system configuration and settings.)

TINP: Input module response time ≤ Delay time of input circuit (Ta) + read cycle (Tb) + Input internal processing time (Tc)

(Communication cycle x 2)

TOUT: Output module response time ≤ Delay time of output internal processing (Td) (communication cycle x 1) + 0 msec. (Te) +

Delay time of output circuit (Tf)

ex.) When EtherCAT communication cycle: 1 msec. and delay time of output: ON,

Input module response time (TINP): Delay time of input circuit (0.5 msec.) + Read time (1 msec.) + Input internal processing

time (1 msec. x 2) = 3.5 [msec.]

Output module responce time(TOUT): Delay time of output internal processing (1 msec.) (communication cycle x 1) + 0 msec. +

Delay time of output circuit (0.2 msec.) = 1.2 [msec.]

Input module

Output module

EtherCAT Com. Cycle

TOUT

TINP

Transmitted from

COM. CPU (Slave)

Received by

COM. CPU (Slave)

TCOM

Transmitted from

PLC (master)

Transmitted to

PLC (master)

R7I4DECT-1-DAC32C-R 数据表(PDF) 6 Page - M-System Co.,Ltd.

R7I4DECT-1-DAC32C-R 数据表(HTML) 6 Page - M-System Co.,Ltd.

Html Pages

1 2 3 4 5 6 7 8 9

数据表下载