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R7HL-LC2-R 数据表(PDF) 10 Page - M-System Co.,Ltd. |
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R7HL-LC2-R 数据表(HTML) 10 Page - M-System Co.,Ltd. |
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10 / 55 page ![]() MODEL: R7HL R7HL SPECIFICATIONS ES-7812 Rev.18 Page 10/55 http://www.m-system.co.jp/ 0 15 ADD.n The data is 12-bit binary. Divided by 8 times scan, 8 points input data is transferred by using CH designation bit. 0 15 CH0 – 7 Analog input data CH designation of analog input data CH designation of analog input data Unused Unused Unused • Di ■ ANALOG INPUT (R7HL-SVF8NL) • Do 0 15 ■ ANALOG OUTPUT (EXCEPT R7HL-YV4L) *1 CH0 Unused Unused CH1 0 15 0 15 0 15 • Di • Do ADD.n (ADD.n) CH0 CH1 ADD.n+2 (ADD.n+1) The data is 16-bit binary. Negative value is represented in 2’s complements. Address in parentheses are for half-duplex mode. *1. Scaling is available with Configurator Software (model: R7CON). Refer to the Configurator Software users manual for detail. 0 15 ADD.n 0 15 CH0 – 3 Analog output data CH designation of analog output data Unused Analog output data CH designation of analog output data Unused • Di ■ ANALOG OUTPUT (R7HL-YV4L) • Do The data is 12-bit binary. Divided by 4 times scan, 4 points output data is transferred by using CH designation bit. For Di, the data written to Do is echoed back. |
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