ST19WI18

2/3

HARDWARE DESCRIPTION

The product, member of the ST19W platform, is a

serial access microcontroller specially designed

for cost effective secure portable applications.

It is manufactured using an advanced highly reli-

able ST CMOS EEPROM technology.

It is based on the STMicroelectronics 8 bit CPU al-

ready implemented on the ST19X product family

and includes on-chip memories: User ROM, User

RAM and EEPROM with state of the art security

features. ROM, RAM and EEPROM memories can

be configured into partitions with customized ac-

cess rules.

An additional ST ROM contains all ST provided

functions and libraries.

Access from any memory area to another are pro-

tected by hardware FIREWALLS. Access rules are

User defined and can be selected by mask options

or during the life of the product.

The chip includes an Enhanced DES accelerator

which is accessible via cryptographic software li-

braries located in ST ROM.

The chip includes also a MAP which is based on a

1088 bits processor architecture. It processes

modular multiplication, squaring and additional

calculations up to 2176 bit operands.

Internal Modular Arithmetic Processor (MAP) and

DES accelerator are designed to speed up crypto-

graphic calculations using Public Key Algorithms

and Secret Key Algorithms.

As with all the other ST19W products, serial inter-

faces fully compatible with the ISO7816 standard

for Smartcard applications are available.

This product includes one other interface: I2C

(Fully compatible with Phillips I2C spec rev 2.1)

A CRC calculation block is also available and is di-

rectly accessible by the User.

Figure 2. Block Diagram

SOFTWARE DEVELOPMENT

Software development and firmware generation

(ROM and options) are supported by a compre-

hensive set of development tools, dedicated at de-

velopment and validation of softwares:

–

Smartcard ICs Emulator,

–

ST19X simulation package,

–

ScDevTools pack environment for all

–

Powerful C/C++ compiler and debugger are

also available (third party tools).

INTERNAL BUS

MEMORY ACCESS FIREWALL

GND

8 BIT

CPU

3 X

8 BIT

TIMERS

CRC

MODULE

CLK

CLOCK

GENE-

RATOR

MODULE

ST ROM, MAP and DES FIREWALL

RAM

USER ROM

ST ROM

and CRYPTO

LIBRARY

EDES

ACCELE-

RATOR

MAP

502

Vcc

GUN A

&

GUN B

SECU-

RITY

ADMIN.

RESET

EEPROM

I/O0

2 SERIAL

I/O

INTER-

FACES

I/O1

SDA

I2C

INTER-

FACE

SCL

IART