24CS512-ESLASHSM datasheet(10/66 Pages) MICROCHIP

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24CS512

DS20005769C-page 10

 2018-2021 Microchip Technology Inc.

3.3

Device Addressing

Communication with the 24CS512 begins with an 8-bit

device address byte, comprised of a 7-bit client

address and a Read/Write Select (R/W) bit. Since mul-

tiple client devices can reside on the serial bus, each

client device must have its own unique address so that

the host can access each device independently.

The 7-bit client address can be constructed in two

ways. Most communications utilize a 4-bit device type

identifier, followed by a 3-bit hardware client address.

Additionally, the 24CS512 can accept a reserved 7-bit

host code, which is then followed by a device type iden-

tifier and hardware client address. This 7-bit host code

enables access to different modes of operation within

the device.

The 24CS512 will respond to only specific device type

identifiers, as shown in Section 3.3.1 “Valid Device

Address Byte Inputs”.

The 3-bit hardware client address is comprised of bits

A2, A1 and A0. These bits can be used to expand the

address space by allowing up to eight devices with the

same device type identifiers on the bus. These hard-

ware client address bits must correlate with the logic

level on the corresponding hardwired device address

input pins, A2, A1 and A0.

The device will respond to all valid device address byte

combinations that it receives, except for cases where

the host code sequence specifically calls for no

response.

TABLE 3-1:

DEVICE ADDRESS BYTE STRUCTURE

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0

4-Bit Device Type Identifier

3-Bit Hardware Client Address

Read/Write

Select

7-Bit Reserved Host Code

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