The Sample and Hold DC level illustrated in Figure 6. is

derived from a measurement of the re-circulating Schottky

diode anode current. The re-circulating diode anode should

be connected to the IS pin. The diode current flows through

an internal current sense resistor between the IS and PGND

pins. The voltage level across the sense resistor is sampled

and held just prior to the onset of the next conduction interval

of the buck switch. The diode current sensing and sample &

hold provide the dc level of the reconstructed current signal.

The positive slope inductor current ramp is emulated by an

external capacitor connected from the RAMP pin to AGND

and an internal voltage controlled current source. The ramp

current source that emulates the inductor current is a func-

tion of the Vin and Vout voltages per the following equation:

I

Proper selection of the RAMP capacitor depends upon the

selected value of the output inductor. The value of C

RAMP

can be selected from: C

of the output inductor in Henrys. With this value, the scale

factor of the emulated current ramp will be approximately

equal to the scale factor of the dc level sample and hold ( 0.5

V / A). The C

the device and connected directly to the pins of the IC

(RAMP and AGND).

For duty cycles greater than 50 percent, current mode con-

trol circuits are subject to sub-harmonic oscillation. Adding a

fixed slope voltage ramp signal (slope compensation) to the

current sense signal prevents this oscillation. The 25µA of

offset current provided from the emulated current source

adds some fixed slope to the ramp signal. In some very high

duty cycle applications, additional slope may be required. In

these applications, the ramp capacitor value can be de-

creased to increase the ramp slope compensation.

20170008

FIGURE 6. Composition of Current Sense Signal

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