Preliminary

PL623-38

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 2

DIE PAD ASSIGNMENT

Pad #

Name

X (

µm)

Y (

µm)

Pad Description

1

GNDOSC

329.6

110.1

GND connection for oscillator circuitry.

2

GNDOSC

498.3

110.0

GND connection for oscillator circuitry.

3

GNDANA

696.2

110.0

GND connection for analog circuitry.

4

GNDSHIELD

825.0

110.0

GND shielding connection.

5

GNDSHIELD

973.6

110.0

GND shielding connection.

6

GNDBUF

1150.0

109.1

GND connection for output buffer circuitry.

7

GNDBUF

1183.6

302.2

GND connection for output buffer circuitry.

8

Q

1183.6

452.3

PECL output.

9

QBAR

1183.6

613.5

Complementary PECL output.

10

VDDBUF

1182.4

745.9

VDD connection for output buffer circuitry. VDDBUF should be

separately decoupled from other VDDs whenever possible.

11

VDDBUF

1252.4

903.6

VDD connection for output buffer circuitry. VDDBUF should be

separately decoupled from other VDDs whenever possible.

12

OESEL

1252.4

1081.3

This is the selector input to choose the OE control logic to be

applied, as presented on the OE SELECTION TABLE on page ‘1’.

13

VDDBUF

1058.5

1221.6

VDD connection for output buffer circuitry.

VDDBUF should be separately decoupled from other VDDs

whenever possible.

14

VDDANA

864.5

1221.6

VDD connection for analog circuitry. VDDANA should be

separately decoupled from other VDDs whenever possible.

15

VDDOSC

624.0

1222.7

VDD connection for oscillator circuitry. VDDOSC should be

separately decoupled from other VDDs whenever possible.

16

SEL1

467.1

1222.6

Output Divider Selector pin as presented on the DIVIDER

SELECTOR TABLE on page ‘1’.

17

SEL0

271.1

1222.6

Output Divider Selector pin as presented on the DIVIDER

SELECTOR TABLE on page ‘1’.

18

GNDOSC

109.4

1222.9

GND connection for oscillator circuitry.

19

OECTRL

108.9

1062.1

Output Enable input pad. See OE SELECTION TABLE on page 1.

20

XIN

109.0

865.8

Crystal connector pad. This pad is the input of the crystal

oscillator circuitry. The crystal should be mounted as close to the

IC as possible, with minimum parasitic capacitance.

21

XOUT

108.6

358.4

Crystal connector pad. This pad is the input of the crystal

oscillator circuitry. The crystal should be mounted as close to the

IC as possible, with minimum parasitic capacitance.

22

OECTRL

108.6

146.5

Output Enable input pad. See OE SELECTION TABLE on page 1.