PLL520-88OC-R datasheet(6/7 Pages) PLL

部件名	PLL520-88OC-R

功能描述	Low Phase Noise VCXO (9.5-65MHz)

PDF	7 Pages

Scroll/Zoom	100%

制造商	PLL [PhaseLink Corporation]

网页	http://www.phaselink.com

标志

6 / 7 page

Preliminary

PLL520-88/-89

Low Phase Noise VCXO (9.5-65MHz)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 6

9. PECL Electrical Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

MAX.

UNITS

Output High Voltage

VOH

VDD – 1.025

Output Low Voltage

VOL

RL = 50

Ω to (VDD – 2V)

(see figure)

VDD – 1.620

11. PECL Switching Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Clock Rise Time

@20/80% - PECL

0.6

1.5

Clock Fall Time

@80/20% - PECL

0.5

1.5

OUT

Ω

PECL Levels Test Circuit

PECL Transistion Time Waveform

OUT

50%

20%

80%

VDD

DUTY CYCLE

45 - 55%

55 - 45%

50%

OUT

SKEW

PECL Output Skew

2.0V

PLL520-88OC-R 数据表(PDF) 6 Page - PhaseLink Corporation

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