Preliminary

PLL601-26

Audio Clock Generator

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 1

FEATURES

• Supports the following output frequencies

o

12.288MHz audio clock output

o

24.576MHz audio clock output

o

27MHz reference output

• Accepts Crystal or reference clock inputs

o

Fundamental crystal: 27MHz

o

Reference input: 27MHz

• On-the-fly switching of the two audio frequencies

(12.288MHz, and 24.576MHz).

• Accepts <1.0V reference signal input voltage

• Single 2.5V or 3.3V ± 10% power supply

• Available in 8-Pin SOIC GREEN/RoHS compliant

Package.

DESCRIPTION

The PLL601-26 is a low cost integrated XO IC

designed to work with a fundamental 27MHz crystal

or a clock input. In addition to a 27MHz clock

reference output, it provides two selectable audio

frequencies (12.288MHz, and 24.576MHz), making

the chip ideal for handheld, STB and MPEG Video

applications. Additional system frequencies can also

be supported by cascading the PLL601-26 with

PhaseLink’s QTC programmable clock family.

PACKAGE PIN CONFIGURATION

Note: ^: Internal pull-up resistor. The internal pull-up resistor

results in a default high value when no pull-down resistor is

connected to this pin.

AUDIO CLOCK SELECTION

FSEL

ACLK (MHz)

0

12.288

1(Default)

24.576

BLOCK DIAGRAM

1

2

3

45

6

7

8

XOUT

VDD

GND

27MHz

XIN/FIN

DNC

ACLK

FSEL^