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PLL601-27SCL-R 数据表(PDF) 1 Page - PhaseLink Corporation |
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PLL601-27SCL-R 数据表(HTML) 1 Page - PhaseLink Corporation |
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1 / 4 page ![]() Preliminary PLL601-27 27MHz XO IC with Audio Clock (for Set Top Boxes & MPEG Video) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/08/04 Page 1 FEATURES • 27MHz reference output (from 27MHz crystal input or clock input). • Selectable Audio Clocks supporting: Fs of 32kHz, 44.1kHz, 48kHz, 64kHz and 96kHz 8.192MHz, 11.2896MHz, 12.288MHz, and 24.576MHz audio frequencies • On-the-fly switching of the audio frequency. • 3.3V Operating Voltage. • Available in 8-Pin SOIC. DESCRIPTION The PLL601-27 is a low cost integrated XO IC designed to work with a fundamental 27MHz crystal or a clock input. In addition to a 27MHz clock reference, it provides the most common audio clocks (8.192, 11.2896, 12.288, and 24.576MHz) required by sampling rates of 32kHz, 44.1kHz, 48kHz, 64kHz and 96kHz, making the chip ideal for STB and MPEG Video applications. PACKAGE PIN CONFIGURATION Note: ^: Internal pull-up resistor. The internal pull-up resistor results in a default high value when no pull-down resistor is connected to this pin. AUDIO CLOCK SELECTION S1 S0 ACLK (MHz) 0 0 8.192 0 1 11.2896 1 0 12.288 1 1 24.576 BLOCK DIAGRAM Xout 27MHz Xin [S1-S0] Audio PLL XO ACLK 1 2 3 45 6 7 8 XOUT VDD GND 27MHz XIN/FIN S1^ ACLK S0^ |
类似零件编号 - PLL601-27SCL-R |
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类似说明 - PLL601-27SCL-R |
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