PLL701-14

Low EMI Spread Spectrum 6x Multiplier Clock

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com

Rev 08/12/04 Page 2

BLOCK DIAGRAM

PIN DESCRIPTION

Name

Number

Type

Description

XIN/FIN

1

I

clock input.

XOUT

2

O

Crystal output.

SC0

3

I

Digital control input to select modulation rate. 30k

Ω internal pull-up.

SC1

4

I

Digital control input to select modulation rate. 30k

Ω internal pull-up.

GND

5

P

Ground connection.

FOUT

6

O

Modulated Clock Frequency Output (FOUT = 6 x FIN).

OE

7

I

Output Enable. When low, Tri-states the outputs. 30k

Ω internal pull-up.

VDD

8

P

3.3V Power Supply connection.

FUNCTIONAL DESCRIPTION

Selectable spread spectrum and modulation rates

The PLL701-14 provides center spread modulation as well as selectable modulation rate. Selection is made by

connecting pins 3 (SC0) and 4 (SC1) to a logical “zero” or “one”, according to the Spread Spectrum Selection

table on page 1.

Connecting a selection pin to a logical “one”

All selection pins have an internal pull-up resistor (30k

Ω). This internal pull-up resistor will pull the input value to

a logical “one” by default, i.e. when no connection is made to GND. No external pull-up resistor is therefore

required for connecting a logical “one” upon power-up.

Connecting a selection pin to a logical “zero”

Pins 3 (SC0), 4 (SC1), and 7 (OE) simply need to be grounded to pull the input down to a logical “zero”.

XTAL

OSC

FOUT

XIN/FIN

XOUT

PLL

SST

Control

Logic

OE

SC(0:1)