PLL502-52

Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 1

FEATURES

• Integrated voltage-controlled crystal oscillator

circuitry (VCXO) (pull range 380ppm minimum).

• Uses inexpensive fundamental-mode parallel

resonant crystals (from 20 to 40MHz).

• Integrated divider by 2: output range of 10MHz

to 20MHz.

• 2.5V or 3.3V supply voltage.

• Selectable High Drive (30mA) or Standard Drive

(10mA) output.

• Available in 8-Pin TSSOP or SOIC.

DESCRIPTION

The PLL502-52 is a monolithic low jitter, high per-

formance CMOS VCXO IC Die. It allows the control

of the output frequency with an input voltage

(VCON), using a low cost crystal.

This makes the PLL502-52 ideal for a wide range of

applications requiring a VCXO output in the 10MHz

to 20MHz range, using a fundamental crystal ranging

from 20 to 40 MHz.

PIN CONFIGURATION

Note: ^ denotes internal pull up

OUTPUT RANGE

DIVIDER

FREQUENCY

RANGE

OUTPUT

BUFFER

÷ 2

10 - 20MHz

CMOS

BLOCK DIAGRAM

1

2

3

45

6

7

8

XOUT

N/C

VCON

GND

XIN

VDD

CLK

OE^

XT A L

OS C

OE

XIN

XO UT

CL K

VCO N

VAR IC AP