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Evaluates: USB2GPIOISO

USB2GPIOISO# Adapter Board

Detailed Description of Hardware

Figure 2 shows the USB2GPIOISO# connector block

diagram (taken from the schematic). Note that the

‘arrow’ on each connector indicates the flow of data.

For example, pin 1 on XMA shows that the signal

(CS_AM) comes from the master, passes through the

male connector, and onto USB2GPIOISO# board to the

isolator channel for CS. Then, on the slave side of the

isolator, this signal routes to pin 1 on XSA connector (CS_

AS) and the ‘arrow’ shows the direction is from the isolator,

through the female connector and to the slave board.

The two power domains are on the ‘master’ side (VDD_M

and GNDM), and the ‘slave’ side (VDD_S and GNDS).

The two independent power supplies are provided from

the master board and the slave board with each VDD_

between 1.71V and 5.5V. The two connectors on the

‘master’ side are male connectors and plug into the

female connectors on the USB2GPIO# adapter, as shown

in Figure 3.

MAX14483 has unidirectional data channels and

USB2GPIOISO# is configured in a 14/10 mode rather

than a bidirectional I/O mode, meaning there are 14 channels

communicating from the master to the slave, and 10

channels communicating from the slave to the master.

Refer to the USB2GPIOISO# Adapter Board Schematic

for each channel’s communication direction. The digi-

tal channels on the slave Pmods or EV kits should

follow the same communication directions as on the

USB2GPIOISO# board. The Munich GUI and the EV kit

GUI automatically configure the channel directions based

on this and no jumpers are required for configuration.

Figure 2. USB2GPIOISO# Subsystem Block Diagram

Figure 3. USB2GPIOISO# Board Connected with USB2GPIO# Adapter