8523AGI-03

www.icst.com/products/hiperclocks.html

REV. A OCTOBER 5, 2004

9

Integrated

Circuit

Systems, Inc.

ICS8523I-03

Zo = 50

+

-

C2

0.1u

Zo = 50

C1

0.1u

Zo = 50

R5

50

R2

50

R8

50

+

-

R1

50

R3

50

R12

1K

+

-

R4

50

R9

50

Zo = 50 Ohm

3.3V

Zo = 50 Ohm

R7

50

R10

50

Zo = 50

R6

50

3.3V

+

-

1.8V

Zo = 50

LVHSTL Driver

C3

0.1u

1.8V

1.8V

Zo = 50

Zo = 50

U1

ICS8523-03

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

20

19

18

17

GND

CLK_EN

CLK_SEL

CLK0

nCLK0

CLK1

nCLK1

NC

NC

VDD

nQ3

Q3

VDDO

nQ2

Q2

nQ1

Q0

nQ0

VDDO

Q1

1.8V

Zo = 50

R11

1K

This application note provides general design guide using

ICS8523I-03 LVHSTL buffer. Figure 3 shows a schematic ex-

ample of the ICS8523I-03 LVHSTL Clock buffer. In this example,

the input is driven by an LVHSTL driver. CLK_EN is set at logic

low to select CLK0/nCLK0 input.