83948AYI-147

www.icst.com/products/hiperclocks.html

REV. B NOVEMBER 21, 2005

1

Integrated

Circuit

Systems, Inc.

ICS83948I-147

The ICS83948I-147 is a low skew, 1-to-12

Differential-to-LVCMOS/LVTTL Fanout Buffer and

a member of the HiPerClockS™ family of High

Performance Clock Solutions from ICS. The

ICS83948I-147 has two selectable clock inputs.

The CLK, nCLK pair can accept most standard differential

input levels. The LVCMOS_CLK can accept LVCMOS or

LVTTL input levels. The low impedance LVCMOS/LVTTL out-

puts are designed to drive 50

Ω series or parallel terminated

transmission lines. The effective fanout can be increased

from 12 to 24 by utilizing the ability of the outputs to drive two

series terminated lines.

The ICS83948I-147 is characterized at full 3.3V or full 2.5V

operating supply modes. Guaranteed output and part-to-part

skew characteristics make the ICS83948I-147 ideal for those

clock distribution applications demanding well defined per-

formance and repeatability.

• Twelve LVCMOS/LVTTL outputs

• Selectable LVCMOS/LVTTL clock

or differential CLK, nCLK inputs

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• LVCMOS_CLK accepts the following input levels:

LVCMOS or LVTTL

• Output frequency: 350MHz (maximum)

• Output skew (at 3.3V ± 5%): 100ps (maximum)

• Part-to-part skew (at 3.3V ± 5%): 1ns (maximum)

• Full 3.3V or full 2.5V operating supply

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

HiPerClockS™

ICS

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

32 31 30 29 28 27 26 25

9

10 11 12 13 14 15 16

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

GND

Q4

Q5

GND

Q6

Q7

CLK_SEL

LVCMOS_CLK

CLK

nCLK

CLK_EN

OE

GND

ICS83948I-147

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

Q11

LVCMOS_CLK

CLK

nCLK

1

0

CLK_EN

CLK_SEL

D

Q

LE

OE