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USB5906C/KD 数据表(PDF) 38 Page - Microchip Technology

部件名 USB5906C/KD
功能描述  6-Port USB 3.2 Gen 1 SmartHubTM IC with Support for a Single USB Type-C짰 UFP
PDF  63 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

USB5906C/KD 数据表(HTML) 38 Page - Microchip Technology

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USB5906C
DS00003188B-page 38
2019 - 2021 Microchip Technology Inc.
8.7
Port Split
8.7.1
FEATURE OVERVIEW
This feature allows the USB 2.0 and USB 3.2 Gen 1 PHYs associated with any downstream port to be operationally
separated. The intention of this feature is to allow a system designer to connect an embedded USB 3.x device to the
USB 3.2 Gen 1 PHY, while allowing the USB 2.0 PHY to be used as either a standard USB 2.0 port or with a separate
embedded USB 2.0 device.
This feature operates outside of the provisions of the USB specifications. Operation is intended for specialized applica-
tions only. Contact your local sales representative for additional information.
In order to maintain a positive end user experience, it is recommended that only permanently attached, embedded USB
3.x devices be connected to the USB 3.2 Gen 1 PHY when enabling the Port Split feature. This prevents end users from
attempting to connect USB High-Speed, Full-Speed, or Low-Speed devices to an exposed USB port which only has USB
3.2 Gen 1 connections.
8.7.2
PORT SPLITTING CONFIGURATION
Downstream ports 5 and 6 may be configured for Port Splitting. Port Splitting is configured via register configuration
through SMBus during the hub configuration stage (SOC_CFG) or via the hub’s internal OTP memory.
When Port Splitting is enabled, the existing
PRT_CTLx pin associated with that port will continue to control the USB 2.0
portion of the port in an identical matter. A new pin function assigned to a
GPIOx pin will be activated and configured to
control the USB 3.2 Gen 1 portion of the port. This new pin is named
PRTPWRx_USB3_SPLIT where x indicates the
respective port. Note that overcurrent detection is not supported on the
PRTPWRx_USB3_SPLIT pin. These new pins
are assigned as shown in Table 8-5.
FIGURE 8-11:
RECOMMENDED PORT SPLITTING CONFIGURATIONS
USB
Power
Switch
EN
OCS
5V
USB2.0 
Device
USB58xx/
USB59xx
PRTCTLx
VBUS
Embedded 
USB3.x Device
EN
PRTPWRx_USB3_SPLIT
(GPIOxx)
USB58xx/
USB59xx
PRTCTLx
Embedded 
USB3.x Device
EN
PRTPWRx_USB3_SPLIT
(GPIOxx)
Embedded 
USB2.0 Device
EN



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