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USB7206CT/KDX 数据表(PDF) 7 Page - Microchip Technology |
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USB7206CT/KDX 数据表(HTML) 7 Page - Microchip Technology |
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7 / 56 page ![]() USB7206C DS00003850A-page 7 2021 Microchip Technology Inc. The USB7206C can be configured for operation through internal default settings. Custom OEM configurations are sup- ported through external SPI ROM or OTP ROM. All port control signal pins are under firmware control in order to allow for maximum operational flexibility and are available as GPIOs for customer specific use. The USB7206C is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature ranges. An inter- nal block diagram of the USB7206C in an upstream Type-B application is shown in Figure 2-1. FIGURE 2-1: USB7206C INTERNAL BLOCK DIAGRAM - UPSTREAM TYPE-B APPLICATION Note: All port numbering in this document is LOGICAL port numbering with the device in the default configuration. LOGICAL port numbering is the numbering as communicated to the USB host. It is the end result after any port number remapping or port disabling. The PHYSICAL port number is the port number with respect to the physical PHY on the chip. PHYSICAL port numbering is fixed and the settings are not impacted by LOGICAL port renumbering/remapping. Certain port settings are made with respect to LOGICAL port num- bering, and other port settings are made with respect to PHYSICAL port numbering. Refer to the “Config- uration of USB7202/USB7206/USB725x” application note for details on the LOGICAL vs. PHYSICAL mapping and additional configuration details. Hub Controller Logic 25 Mhz USB3 USB2 +3.3 V VCORE P2 A PHY2 PHY2 P3 A PHY3 PHY3 P4 A PHY4 PHY4 Hub Feature Controller GPIO I 2C OTP SPI Mux P5 A PHY5 PHY5 P1 A PHY1 PHY1 P6 A PHY6 P0 B PHY0 PHY0 I 2S HFC PHY |
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