USB7252CSLASHKDX datasheet(12/63 Pages) MICROCHIP

12 / 63 page

DS00003852A-page 12

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2021 Microchip Technology Inc.

Downstream

Port 3 USB 3.2

Gen 2 TX D+

USB3DN_TXDP3

I/O-U

Downstream SuperSpeed+ Transmit Data

Plus, port 3.

Float

Downstream

Port 3 USB 3.2

Gen 2 TX D-

USB3DN_TXDM3

I/O-U

Downstream SuperSpeed+ Transmit Data

Minus, port 3.

Float

Downstream

Port 3 USB 3.2

Gen 2 RX D+

USB3DN_RXDP3

I/O-U

Downstream SuperSpeed+ Receive Data

Plus, port 3.

Weak pull-

down to

GND

Downstream

Port 3 USB 3.2

Gen 2 RX D-

USB3DN_RXDM3

I/O-U

Downstream SuperSpeed+ Receive Data

Minus, port 3.

Weak pull-

down to

GND

USB 2.0 Interfaces

Upstream USB

2.0 D+

USB2UP_DP

I/O-U

Upstream USB 2.0 Data Plus (D+).

Mandatory

Note 3-12

Upstream USB

2.0 D-

USB2UP_DM

I/O-U

Upstream USB 2.0 Data Minus (D-).

Mandatory

Note 3-12

Downstream

Ports 1-4 USB

2.0 D+

USB2DN_DP[1:4]

I/O-U

Downstream USB 2.0 Ports 1-4 Data Plus

(D+).

Connect

directly to

3.3V

Downstream

Ports 1-4 USB

2.0 D-

USB2DN_DM[1:4]

I/O-U

Downstream USB 2.0 Ports 1-4 Data Minus

(D-)

Connect

directly to

3.3V

SPI Interface

SPI Clock

SPI_CLK

I/O-U

SPI clock. If the SPI interface is enabled,

this pin must be driven low during reset.

Weak pull-

down to

GND

SPI Data 3-0

SPI_D[3:0]

I/O-U

SPI Data 3-0. If the SPI interface is enabled,

these signals function as Data 3 through 0.

Note 3-1

SPI_D0 operates as the

CFG_BC_EN s trap if

external SPI memory is not

used. It must be terminated

with the selected strap

resistor to 3.3V or GND.

SPI_ D[1 :3] should be

connected to GND through

a weak pull-down.

Note 3-1

TABLE 3-1:

PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Buffer

Type

Description

If Unused

USB7252C/KDX 数据表(PDF) 12 Page - Microchip Technology

USB7252C/KDX 数据表(HTML) 12 Page - Microchip Technology

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USB7252C/KDX 数据表(PDF) 12 Page - Microchip Technology

USB7252C/KDX 数据表(HTML) 12 Page - Microchip Technology

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