85301AK

www.icst.com/products/hiperclocks.html

REV. A JANUARY 16, 2006

9

Integrated

Circuit

Systems, Inc.

ICS85301

2:1

The PCLK /nPCLK accepts LVPECL, CML, SSTL and other

differential signals. Both V

and V

face examples for the HiPerClockS PCLK/nPCLK input driven

by the most common driver types. The input interfaces sug-

gested here are examples only. If the driver is from another

vendor, use their termination recommendation. Please con-

sult with the vendor of the driver component to confirm the

driver termination requirements.

BY AN

BY A

BY A

BY A

PCLK/nPCLK

2.5V

Zo = 60 Ohm

SSTL

HiPerClockS

PCLK

nPCLK

R2

120

3.3V

R3

120

Zo = 60 Ohm

R1

120

R4

120

2.5V

BY AN

HiPerClockS

PCLK

nPCLK

PCLK/nPCLK

3.3V

R2

50

R1

50

3.3V

Zo = 50 Ohm

CML

3.3V

Zo = 50 Ohm

3.3V

HiPerClockS

PCLK

nPCLK

R2

84

R3

125

Input

Zo = 50 Ohm

R4

125

R1

84

LVPECL

3.3V

3.3V

Zo = 50 Ohm

BY A

3.3V

3.3V

CML Built-In Pullup

R1

100

PCLK

nPCLK

HiPerClockS

PCLK/nPCLK

Zo = 50 Ohm

Zo = 50 Ohm

R2

50

Zo = 50 Ohm

C1

R1

50

C2

PC L K /n PC LK

R5

100 - 200

Zo = 50 Ohm

R6

100 - 200

PCLK

nPCLK

VBB

3.3V LVPECL

3.3V

3.3V

LVDS

3.3V

Zo = 50 Ohm

3.3V

PCLK

nPCLK

VBB

R2

1K

C2

R1

1K

R5

100

C1

PC L K/n PC L K

Zo = 50 Ohm