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ICS44002AI01 数据表(PDF) 8 Page - Integrated Circuit Systems |
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ICS44002AI01 数据表(HTML) 8 Page - Integrated Circuit Systems |
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8 / 12 page ![]() 844002AGI-01 www.icst.com/products/hiperclocks.html REV. A JANUARY 5, 2006 8 Integrated Circuit Systems, Inc. ICS844002I-01 FEMTOCLOCKS™CRYSTAL-TO- LVDS FREQUENCY SYNTHESIZER INPUTS: CRYSTAL INPUT: For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating. Though not required, but for additional protection, a 1k Ω resistor can be tied from XTAL_IN to ground. REF_CLK INPUT: For applications not requiring the use of the reference clock, it can be left floating. Though not required, but for additional protection, a 1k Ω resistor can be tied from the REF_CLK to ground. LVCMOS CONTROL PINS: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS OUTPUTS LVDS All unused LVDS output pairs can be either left floating or terminated with 100 Ω across. If they are left floating, we recommend that there is no trace attached. transmission line environment. For buffer with multiple LDVS driver, it is recommended to terminate the unused outputs. 2.5V LVDS DRIVER TERMINATION Figure 3 shows a typical termination for LVDS driver in characteristic impedance of 100 Ω differential (50Ω single) FIGURE 3. TYPICAL LVDS DRIVER TERMINATION 2.5V 100 Ohm Differential Transmission Line 2.5V LVDS_Driv er R1 100 + - 100 Ω Ω Ω Ω Ω Differential Transmission Line |
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