844256AM

www.icst.com/products/hiperclocks.html

REV. A NOVEMBER 29, 2005

9

Integrated

Circuit

Systems, Inc.

ICS844256

PRELIMINARY

As in any high speed analog circuitry, the power supply

pins are vulnerable to random noise. The ICS844256 pro-

vides separate power supplies to isolate any high switch-

ing noise from the outputs to the internal PLL. V

V

plane through vias, and bypass capacitors should be used

for each pin. To achieve optimum jitter performance, power

supply isolation is required. Figure 1 illustrates how a 10

Ω

resistor along with a 10

μF and a .01μF bypass capacitor

should be connected to each V

can also be replaced by a ferrite bead.

10

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

The ICS844256 has been characterized with 18pF parallel

resonant crystals. The capacitor values shown in Figure 2

below were determined using an 18pF parallel resonant crys-

tal and were chosen to minimize the ppm error.

C1

18p

X1

18pF Parallel Crystal

C2

22p

XTAL_IN

XTAL_OUT