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MAX5940BESA 数据表(PDF) 7 Page - Maxim Integrated Products |
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MAX5940BESA 数据表(HTML) 7 Page - Maxim Integrated Products |
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7 / 15 page ![]() Classification Mode (12.6V ≤ VIN ≤ 20V) In the classification mode, the PSE classifies the PD based on the power consumption required by the PD. This allows the PSE to efficiently manage power distri- bution. The IEEE 802.3af standard defines five different classes as shown in Table 1. An external resistor (RCL) connected from RCLASS to VEE sets the classification current. The PSE determines the class of a PD by applying a volt- age at the PD input and measures the current sourced out of the PSE. When the PSE applies a voltage between 12.6V and 20V, the MAX5940_ exhibit a current charac- teristic with values indicated in Table 2. The PSE uses the classification current information to classify the power requirement of the PD. The classification current includes the current drawn by the 25.5k Ω detection signature resistor and the supply current of the MAX5940_ so the total current drawn by the PD is within the IEEE 802.3af standard figures. The classification current is turned off whenever the device is in power mode. Power Mode During power mode, when VIN rises above the under- voltage lockout threshold (VUVLO,ON), the MAX5940_ gradually turn on the internal N-channel MOSFET Q1 (see Figure 2). The MAX5940_ charge the gate of Q1 with a constant current source (10µA, typ). The drain- to-gate capacitance of Q1 limits the voltage rise rate at the drain of the MOSFET, thereby limiting the inrush current. To reduce the inrush current, add external drain-to-gate capacitance (see the Inrush Current Limit section). When the drain of Q1 is within 1.2V of its source voltage and its gate-to-source voltage is above 5V, the MAX5940_ asserts the PGOOD/PGOOD out- puts. The MAX5940_ have a wide UVLO hysteresis and turn-off deglitch time to compensate for the high impedance of the twisted-pair cable. Undervoltage Lockout The MAX5940_ operate up to a 67V supply voltage with a default UVLO turn-on (VUVLO,ON) set at 35V (MAX5940A/MAX5940C) or 39V (MAX5940B/MAX5940D) and a UVLO turn-off (VUVLO,OFF) set at 30V. The MAX5940B/MAX5940D have an adjustable UVLO thresh- old using a resistor-divider connected to UVLO (see Figure 3). When the input voltage is above the UVLO threshold, the IC is in power mode and the MOSFET is on. When the input voltage goes below the UVLO thresh- old for more than tOFF_DLY, the MOSFET turns off. IEEE 802.3af PD Interface Controller For Power-Over-Ethernet _______________________________________________________________________________________ 7 CLASS USAGE RCL ( Ω) MAXIMUM POWER USED BY PD (W) 0 Default 10k 0.44 to 12.95 1 Optional 732 0.44 to 3.84 2 Optional 392 3.84 to 6.49 3 Optional 255 6.49 to 12.95 4 Not Allowed 178 Reserved* *Class 4 reserved for future use. Table 1. PD Power Classification/RCL Selection CLASS CURRENT SEEN AT VIN (mA) IEEE 802.3af PD CLASSIFICATION CURRENT SPECIFICATION (mA) CLASS RCL ( Ω)VIN* (V) MIN MAX MIN MAX 0 10k 12.6 to 20 02 04 1 732 12.6 to 20 9.17 11.83 9 12 2 392 12.6 to 20 17.29 19.71 17 20 3 255 12.6 to 20 26.45 29.55 26 30 4 178 12.6 to 20 36.6 41.4 36 44 *VIN is measured across the MAX5940 input pins, which does not include the diode bridge voltage drop. Table 2. Setting Classification Current |
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