ICS421002AI01 datasheet(1/13 Pages) ICST

部件名	ICS421002AI01

功能描述	FEMTOCLOCKS??CRYSTAL-TO-HSTL FREQUENCY SYNTHESIZER

PDF	13 Pages

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制造商	ICST [Integrated Circuit Systems]

网页	http://www.icst.com

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1 / 13 page

8421002AGI-01

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 6, 2006

1

Integrated

Circuit

Systems, Inc.

ICS8421002I-01

FEMTOCLOCKS™CRYSTAL-TO-

HSTL FREQUENCY SYNTHESIZER

GENERAL DESCRIPTION

The ICS8421002I-01 is a 2 output HSTL

Synthesizer optimized to generate Ethernet

reference clock frequencies and is a member of

the HiPerClocksTM family of high performance

clock solutions from ICS. Using a 25MHz,

18pF parallel resonant crystal, the following frequencies

can be generated based on the 2 frequency select pins

(F_SEL[1:0]): 156.25MHz, 125MHz and 62.5MHz. The

ICS8421002I-01 uses ICS’ 3rd generation low phase

noise VCO technology and can achieve 1ps or lower typi-

cal r ms phase jitter, easily meeting Ether net jitter

requirements. The ICS8421002I-01 is packaged in a small

20-pin TSSOP package.

FEATURES

• Two HSTL outputs (VOHmax = 1.5V)

• Selectable crystal oscillator interface

or LVCMOS/LVTTL single-ended input

• Supports the following output frequencies: 156.25MHz,

125MHz, 62.5MHz

• VCO range: 560MHz - 680MHz

• RMS phase jitter @ 156.25MHz, using a 25MHz crystal

(1.875MHz - 20MHz): 0.44ps (typical)

• Power supply modes:

Core/Output

3.3V/1.8V

2.5V/1.8V

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS compliant

packages

HiPerClockS™

ICS

1

0

1

0

Phase

Detector

VCO

M = 25 (fixed)

F_SEL[1:0]

0 0

÷4 (default)

0 1

÷5

1 0

÷10

1 1

Not Used

2

OSC

ICS8421002I-01

20-Lead TSSOP

6.5mm x 4.4mm x 0.92mm

package body

G Package

Top View

BLOCK DIAGRAM

y

c

n

e

u

q

e

r

F

t

u

p

t

u

O

)

.

f

e

R

z

H

M

5

2

(

1

L

E

S

_

F0

L

E

S

_

F

r

e

d

i

v

i

D

M

e

u

l

a

V

r

e

d

i

v

i

D

N

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u

l

a

V

00

5

24

5

2

.

6

5

1

01

5

25

5

2

1

10

5

20

15

.

2

6

11

d

e

s

u

t

o

nd

e

s

u

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n

FREQUENCY SELECT FUNCTION TABLE

F_SEL[1:0]

nPLL_SEL

REF_CLK

XTAL_IN

XTAL_OUT

nXTAL_SEL

MR

Q0

nQ0

Q1

nQ1

Pulldown

25MHz

Pulldown

nc

VDDO

Q0

nQ0

MR

nPLL_SEL

nc

VDDA

F_SEL0

VDD

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

VDDO

Q1

nQ1

GND

VDD

nXTAL_SEL

REF_CLK

XTAL_IN

XTAL_OUT

F_SEL1

PIN ASSIGNMENT

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