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USB5906 数据表(PDF) 39 Page - Microchip Technology |
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USB5906 数据表(HTML) 39 Page - Microchip Technology |
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39 / 64 page ![]() 2016-2021 Microchip Technology Inc. DS00002242E-page 40 USB5906 8.7.2.1 Enabling Port Splitting In order to enable the Port Splitting feature on downstream ports 5 and/or6, the following configuration settings must be made. Enabling Port Splitting on Port 5: • Write 0x42 to register 0x416E to select GPIO66 for Option A • Write 0x05 to register 0x416E to select GPIO5 for Option B • Set bit 5 of the USB3_PORT_SPLIT_EN (0x3C48 = 0x20) • Set bit 0 of the PORTSPLITENABLEFLAG (0x4141 = 0x01) Enabling Port Splitting on Port 6: • Write 0x06 to register 0x416F to select GPIO6 for Option A • Write 0x04 to register 0x416F to select GPIO4 for Option B • Set bit 6 of the USB3_PORT_SPLIT_EN (0x3C48 = 0x40) • Set bit 0 of the PORTSPLITENABLEFLAG (0x4141 = 0x01) TABLE 8-5: PORT SPLIT PRTPWRX_USB3_SPLIT PIN ASSIGNMENT GPIOx Pin Port Split Assignment GPIO66 PRTPWR5_USB3_SPLIT Option A GPIO6 PRTPWR6_USB3_SPLIT Option A GPIO5 PRTPWR5_USB3_SPLIT Option B GPIO4 PRTPWR6_USB3_SPLIT Option B TABLE 8-6: USB 3.0 PORT SPLIT ENABLE REGISTER USB3_PORT_SPLIT_EN (0x3C48 - RESET = 0x00) USB 3.0 Port Split Enable BIT Name R/W Description 7:1 PORT_SPLIT_EN[7:1] R/W 0 = Port Splitting on the specified port is disabled 1 = Port Splitting on the specified port is enabled Bit [1] - Reserved [2] - Reserved [3] - Reserved [4] - Reserved [5] - Port 5 [6] - Port 6 [7] - Reserved 0 Reserved R Reserved |
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