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Z8018010FSC 数据表(PDF) 21 Page - Zilog, Inc. |
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Z8018010FSC 数据表(HTML) 21 Page - Zilog, Inc. |
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21 / 124 page ![]() Z 8018x Fam il y M PU Use r M anual 6 UM005001-ZMP0400 Figure 4. Z80180/Z8S180/Z8L180 Block Diagram MMU Address Buffer Data Buffer A0 –A19 D0 –DF Asynchronous SCI (Channel 0) CPU DMACs (2) DREQ1 TEND1 CKA0/DREQ0 Interrupt Bus State Control Asynchronous SCI (channel 0) RXA0 RTS0 CTS0 DCD0 TXA0 TXA1 CKA1/TEND0 RXA1 VCC VSS 16-bit Programmable Reload Timers TXS RXS/CTS1 CKS A18/TOUT Clocked Serial I/O Port Timing Generator Phi |
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