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ADP1052ACPZ-R7 数据表(PDF) 92 Page - Analog Devices |
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ADP1052ACPZ-R7 数据表(HTML) 92 Page - Analog Devices |
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92 / 113 page ![]() ADP1052 Data Sheet Rev. B | Page 92 of 113 VOLTAGE SENSE AND LIMIT SETTING REGISTERS Table 137. Register 0xFE20—VS Gain Trim Bits Bit Name/Function R/W Description 7 Trim polarity R/W 0 = positive gain is introduced. 1 = negative gain is introduced. [6:0] VS gain trim R/W These bits set the amount of gain trim that is applied to the VS ADC reading. This register trims the voltage reading in the READ_VOUT command after the VOUT_CAL_OFFSET trimming is completed. This register is trimmed until the READ_VOUT reading in the register exactly matches the output voltage measurement result. Table 138. Register 0xFE25—Prebias Start-Up Enable Bits Bit Name/Function R/W Description 7 Prebias startup enable R/W Setting this bit enables the prebias start-up function. If it is enabled, the soft start ramp starts from the current output voltage. The initial PWM modulation value is generated based on the following: the Register 0xFE39 setting, the sensed VOUT value, and the sensed VIN value. To introduce the VIN value for initial modulation calculation, Register 0xFE6C[1] = 1, unless closed-loop input voltage feedforward operation mode is in use. [6:0] Reserved R/W Reserved. Table 139. Register 0xFE26—VOUT_OV_FAULT Flag Debounce Bits Bit Name/Function R/W Description [7:6] VOUT_OV_FAULT flag debounce R/W These bits set the VOUT_OV_FAULT flag debounce time. Bit 7 Bit 6 Typical Debounce Time (μs) 0 0 0 0 1 1 1 0 2 1 1 8 [5:0] Reserved R/W Reserved Table 140. Register 0xFE28—VF Gain Trim Bits Bit Name/Function R/W Description 7 Trim polarity R/W 0 = positive gain is introduced. 1 = negative gain is introduced. [6:0] VF trim R/W These bits set the amount of gain trim that is applied to the VF ADC reading. This register trims the voltage at the VF pin for external resistor tolerances. When there is 1 V on the VF pin, this register is trimmed until the VF value register reads 1280 decimal (0x500). Table 141. Register 0xFE29—VIN_ON and VIN_OFF Delay Bits Bit Name/Function R/W Description [7:6] Reserved R/W Reserved. 5 VIN_UV_FAULT enable R/W Setting this bit enables the VIN_ON value and the VIN_OFF value used to generate the VIN_UV_FAULT flag. 4 Power conversion stop delay R/W Sets the delay time from when the VIN_LOW flag is set to when the power conversion stops. 0 = 0 ms. 1 = 1 ms. [3:2] Power conversion start delay R/W Sets the delay time from the clearing of the VIN_LOW flag to the start of the power conversion. Bit 3 Bit 2 Delay Time (ms) 0 0 0 0 1 10 1 0 40 1 1 80 |
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