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ADP2442ACPZ-R7 数据表(PDF) 15 Page - Analog Devices

部件名 ADP2442ACPZ-R7
功能描述  36 V,1 A, Synchronous, Step-Down, DC-to-DC Regulator with External Clock Synchronization
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2442ACPZ-R7 数据表(HTML) 15 Page - Analog Devices

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Data Sheet
ADP2442
Rev. B | Page 15 of 36
INTERNAL BLOCK DIAGRAM
Figure 51. Internal Block Diagram
VIN
POWER STAGE
UVLO
INTERNAL LDO
VCC
BST
STATE MACHINE GATE
CONTROL LOGIC
EN
+
1.25V
FB
SS
ISS
+
+
–
VREF = 0.6V
SYNC
SW
PGND
NMOS
NMOS
SLOPE
COMPENSATION/
RAMP
GENERATOR
CURRENT
LIMIT
COMPARATOR
CURRENT SENSE
AMPLIFIER
REFERENCE
CURRENT
BAND GAP
REFERENCE
PWM
COMPARATOR
FREQ
OSC
HICCUP
TIMER
COMP
THRESHOLD
PULSE SKIP
ENABLE
CLOCK
ENABLE
VCC
PULSE SKIP ENABLE
COMP
1V
PWM
HICCUP
+
+
–
AGND
115% OF
FEEDBACK
PGOOD
VFB
86% OF
FEEDBACK
+
–



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