USB7016TSLASHKDX datasheet(14/59 Pages) MICROCHIP

14 / 59 page

USB7016

DS00003740A-page 14



2021 Microchip Technology Inc.

Downstream

Port 1 Type-C

CC2

DP1_CC2

I/O12

Used for Type-C attach and orientation

detection on Port 1. Includes configurable

Rp/Ra selection. Connect this pin directly to

the CC2 pin of the respective Type-C con-

nector.

Note 3-5

If unused: Weak pull-down

to GND. This pin may only

be left unused if Port 1 is

disabled or reconfigured to

operate in legacy Type-A

mod e

thro ug h

hu b

configuration.

Note 3-5

Upstream

Voltage Monitor

VBUS_MON_UP

I/O12

Used to detect VBUS on the upstream port.

Externally, VBUS can be as high as 5.25 V,

which can be damaging to this pin. The

amplitude of VBUS must be reduced by a

voltage divider. The recommended voltage

divider is shown below. 1% tolerance resis-

tors are recommended.

Note:

For embedded host applications,

this pin should be controlled by

an I/O on the host processor to a

2.68V logic level.

Mandatory

Note 3-8

Miscellaneous

Programmable

Function Pins

PF[31:3]

I/O12

Programmable function pins.

Note 3-6

If unused: depends on the

configured pin function.

Refer to Section 3.3.4,

PF[31:3] Configuration

(CFG_STRAP[2:1])

Note 3-6

Test 1

TEST1

Test 1 pin.

This signal is used for test purposes and

must always be pulled-up to 3.3V via a 10

k resistor.

Pull to 3.3V

through a

10 k

resistor

Test 2

TEST2

Test 2 pin.

This signal is used for test purposes and

must always be pulled-up to 3.3V or GND

via a 10 k resistor.

Pull to 3.3V

or GND

through a

10 k

resistor

TABLE 3-1:

PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Buffer

Type

Description

If Unused

VBUS_UP

43K

VBUS_MON_UP

USB7016T/KDX 数据表(PDF) 14 Page - Microchip Technology

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USB7016T/KDX 数据表(PDF) 14 Page - Microchip Technology

USB7016T/KDX 数据表(HTML) 14 Page - Microchip Technology

Html Pages

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链接网址

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