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ADP5304ACPZ-2-R7 数据表(PDF) 6 Page - Analog Devices |
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ADP5304ACPZ-2-R7 数据表(HTML) 6 Page - Analog Devices |
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6 / 17 page ![]() ADP5304 Data Sheet Rev. 0 | Page 6 of 17 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 EN NC MODE VID FB 10 NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD. SOLDER THE EXPOSED PAD TO A LARGE EXTERNAL COPPER GROUND PLANE UNDERNEATH THE IC FOR THERMAL DISSIPATION. 9 8 7 6 PVIN SW PGND AGND VINOK ADP5304 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 EN Enable Input for the Regulator. A logic low on this pin disables the regulator. 2 NC No Connect. Connect this pin to ground. 3 MODE Operating Mode Pin. Connect this pin to ground; the regulator operates in hysteresis mode. 4 VID Voltage Configuration Pin. Connect one resistor from this pin to ground to configure the output voltage of the regulator. 5 FB Feedback Sensing Input for the Regulator. 6 VINOK Input Power-Good Signal. This open-drain output is the power-good signal for the input voltage. 7 AGND Analog Ground. 8 PGND Power Ground. 9 SW Switching Node Output for the Regulator. 10 PVIN Power Input for the Regulator. EPAD Exposed Pad. Solder the exposed pad to a large external copper ground plane underneath the IC for thermal dissipation. |
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