DocID031835 Rev 1

13/28

STSPIN840

Detailed description

28

5.2

Logic inputs

The outputs of each full bridge are controlled by the respective PWMx and PHx inputs. The

status of the power bridge is also determined by the PWM current controller as indicated in

Section 5.3.

Figure 4. Dual brush DC motor driver time diagram

Table 7. Truth table

ENx

PHx

PWMx

OUTx1

OUTx2

Full bridge condition

X(1)

High Z(2)

Disabled

1

0

0

GND

GND

Both LS on

1

0

1

GND

VS

HS2 and LS1 on (current OUTx1

 OUTx2)

1

1

0

GND

GND

Both LS on

1

1

1

VS

GND

HS1 and LS2 on (current OUTx1

 OUTx2)

1. X: don't care.

2. High Z: high impedance.