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ISO6763FDWR 数据表(PDF) 7 Page - Texas Instruments

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部件名 ISO6763FDWR
功能描述  ISO6760L Six-Channel Reinforced Digital Isolators with Integrated Interlock and Robust EMC
PDF  44 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

ISO6763FDWR 数据表(HTML) 7 Page - Texas Instruments

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6.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
DW-16
CLR
External clearance(1)
Shortest terminal-to-terminal distance through air
>8
mm
CPG
External creepage(1)
Shortest terminal-to-terminal distance across the
package surface
>8
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
>17
um
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
>600
V
Material group
According to IEC 60664-1
I
Overvoltage category per IEC 60664-1
Rated mains voltage ≤ 600 VRMS
I-IV
Rated mains voltage ≤ 1000 VRMS
I-III
DIN VDE V 0884-11:2017-01(2)
VIORM
Maximum repetitive peak isolation voltage
AC voltage (bipolar)
2121
VPK
VIOWM
Maximum working isolation voltage
AC voltage; Time dependent dielectric breakdown
(TDDB) Test;
See Insulation Lifetime Projection Data
1500
VRMS
DC voltage
2121
VDC
VIOTM
Maximum transient isolation voltage
VTEST = VIOTM,
t = 60 s (qualification);
VTEST = 1.2 x VIOTM,
t= 1 s (100% production)
7071
VPK
VIOSM
Maximum surge isolation voltage(3)
Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.6 x VIOSM = 10,000 VPK (qualification)
6250
VPK
qpd
Apparent charge(4)
Method a, After Input-output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 x VIORM, tm = 10 s
≤5
pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.6 x VIORM, tm = 10 s
≤5
Method b1; At routine test (100% production) and
preconditioning (type test)
Vini = 1.2 x VIOTM, tini = 1 s;
Vpd(m) = 1.875 x VIORM, tm = 1 s
≤5
CIO
Barrier capacitance, input to output(5)
VIO = 0.4 x sin (2πft), f = 1 MHz
~1
pF
RIO
Isolation resistance(5)
VIO = 500 V, TA = 25°C
>1012
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
>1011
VIO = 500 V at TS = 150°C
>109
Pollution degree
2
Climatic category
40/125/21
UL 1577
VISO
Maximum withstanding isolation voltage
VTEST = VISO , t = 60 s (qualification),
VTEST = 1.2 x VISO , t = 1 s (100% production)
5000
VRMS
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.
Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become
equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these
specifications.
(2)
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured
by means of suitable protective circuits.
(3)
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4)
Apparent charge is electrical discharge caused by a partial discharge (pd).
(5)
All pins on each side of the barrier tied together creating a two-terminal device.
www.ti.com
ISO6760L
SLLSFO3 – DECEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
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