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DS20006013A-page 1

VP3203

Features

• Free from Secondary Breakdown

• Low Power Drive Requirement

• Ease of Paralleling

• Excellent Thermal Stability

• Integral Source-to-Drain Diode

• High Input Impedance and High Gain

Applications

• Motor Controls

• Converters

• Amplifiers

• Switches

• Power Supply Circuits

• Drivers (Relays, Hammers, Solenoids, Lamps,

Memories, Displays, Bipolar Transistors, etc.)

General Description

The VP3203 Enhancement-mode (normally-off)

transistor uses a vertical DMOS structure and a

well-proven silicon-gate manufacturing process. This

combination produces a device with the power

handling capabilities of bipolar transistors and the high

input impedance and positive temperature coefficient

inherent in MOS devices. Characteristic of all MOS

structures, this device is free from thermal runaway and

thermally induced secondary breakdown.

Microchip’s vertical DMOS FETs are ideally suited for a

wide range of switching and amplifying applications

where very low threshold voltage, high breakdown

voltage, high input impedance, low input capacitance,

and fast switching speeds are desired.

Package Types

See Table 3-1 and Table 3-2 for pin information.

3-lead TO-92

(Top view)

GATE

SOURCE

DRAIN

3-lead SOT-89

(Top view)

GATE

SOURCE

DRAIN

DRAIN

P-Channel Enhancement-Mode Vertical DMOS FET