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[v2-01] 2016-Oct-12

AS1130 − Register Description

Interrupt Frame Definition Register (0x08)

Per default this register is set to 0x3F.

Figure 47:

Interrupt Frame Definition Register Format

2open_err

R/W

IRQ pin triggers if an error on the open test occurs

0: Disabled

1: Enabled

1short_err

R/W

IRQ pin triggers if an error on the short test occurs

0: Disabled

1: Enabled

movie_fin

R/W

IRQ pin triggers if a movie is finished

0: Disabled

1: Enabled

0x08 Interrupt Frame Definition Register

Bit

Bit Name

Default

Access

Bit Description

7:6

n/a

5:0

last_frame

111111

R/W

After this frame is displayed the last time

(depending on the number of loops played in a

movie) an interrupt will be triggered.

000000: Frame 0

000001: Frame 1

000010: Frame 2

000011: Frame 3

000100: Frame 4

000101: Frame 5

..................

100000: Frame 32

100001: Frame 33

100010: Frame 34

100011: Frame 35

0x07 Interrupt Mask Register

Bit

Bit Name

Default

Access

Bit Description

AS1130 数据表(PDF) 44 Page - ams AG

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