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AS3715 数据表(PDF) 74 Page - ams AG |
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AS3715 数据表(HTML) 74 Page - ams AG |
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74 / 160 page  Page 74 ams Datasheet, Confidential Document Feedback [v1-00] 2014-Sep-10 AS3715 − Detailed Description – System Functions Figure 75: ADC Timing Diagram ADC Timing Diagram: Shows timing of the control and data signals of the internal ADC. Serial Control Interfaces I²C Feature List • Fast mode capability (max. SCL-frequency is 400kHz) • 7+1-bit addressing mode • 60h x 8-bit data registers (word address 0x00 - 0x60) • Write formats: Single-Byte-Write, Page-Write • Read formats: Current-Address-Read, Random-Read, Sequential-Read • SDA input delay and SCL spike filtering by integrated RC-components start_conversion 0 11 ADC clock ADC on ADC start 16us if adc_presample = 0 else 96us result_not_ready D[9:0] result ready result not valid 1 12 ADC eoc |
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