ADP7142

Data Sheet

Rev. H | Page 6 of 23

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

3

GND

1

VOUT

2

SENSE/ADJ

4EN

6VIN

5SS

ADP7142

TOP VIEW

(Not to Scale)

EXPOSED PAD

NOTES

1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE

ENHANCES THERMAL PERFORMANCE AND IS

ELECTRICALLY CONNECTED TO GND INSIDE THE

PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED

PAD CONNECT TO THE GROUND PLANE ON THE BOARD.

Figure 3. 6-Lead LFCSP Pin Configuration

ADP7142

TOP VIEW

(Not to Scale)

1

VIN

2

GND

3

EN

5

VOUT

4

SENSE/ADJ

Figure 4. 5-Lead TSOT Pin Configuration

ADP7142

TOP VIEW

(Not to Scale)

VIN

8

VIN

7

SS

6

EN

5

NOTES

1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE

ENHANCES THERMAL PERFORMANCE AND IS

ELECTRICALLY CONNECTED TO GND INSIDE THE

PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED

PAD CONNECT TO THE GROUND PLANE ON THE BOARD.

Figure 5. 8-Lead SOIC Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

6-Lead

LFCSP

8-Lead

SOIC

5-Lead

TSOT

Mnemonic

Description

1

1, 2

5

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a 2.2 μF or greater capacitor.

2

3

4

SENSE/ADJ

Sense Input (SENSE). Connect to load. An external resistor divider may also be used to

set the output voltage higher than the fixed output voltage (ADJ).

3

4

2

GND

Ground.

4

5

3

EN

The enable pin controls the operation of the LDO. Drive EN high to turn on the

regulator. Drive EN low to turn off the regulator. For automatic startup, connect

EN to VIN.

5

6

Not

applicable

SS

Soft Start. An external capacitor connected to this pin determines the soft-start

time. Leave this pin open for a typical 380 μs start-up time. Do not ground this pin.

6

7, 8

1

VIN

Regulator Input Supply. Bypass VIN to GND with a 2.2 μF or greater capacitor.

EP

Exposed Pad. The exposed pad on the bottom of the package enhances thermal

performance and is electrically connected to GND inside the package. It is

recommended that the exposed pad connect to the ground plane on the board.