ADP7185

Data Sheet

Rev. 0 | Page 6 of 19

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

3

VA

4

VAFB

1

VOUT

2

SENSE

6GND

5EN

8VIN

7VREG

NOTES

1. EXPOSED PAD. THE EXPOSED PAD ENHANCES THE

THERMAL PERFORMANCE AND IS ELECTRICALLY

CONNECTED TO VIN INSIDE THE PACKAGE. IT IS

RECOMMENDED THAT THE EXPOSED PAD CONNECT

TO THE INPUT VOLTAGE PLANE ON THE BOARD.

ADP7185

TOP VIEW

(Not to Scale)

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a 4.7 μF or greater capacitor.

2

SENSE

Sense Input. Connect this pin to VOUT.

3

VA

Low Noise Reference Voltage. Connect a 1 μF capacitor to GND to reduce noise. Do not connect a load to ground.

4

VAFB

Output Voltage Reference Feedback (Adjust Mode). Connect a 1 nF to 1 μF capacitor between the VAFB pin and

the VA pin to reduce noise. Start-up time is increased as a function of the capacitance. Connect an external resistor

divider between the VA pin and the VAFB pin to set the output voltage in adjust mode.

5

EN

Enable. Drive EN at least +1.25 V above or −1.3 V below ground to enable the regulator or drive EN to ground to

turn the regulator off. For automatic startup, connect EN to VIN.

6

GND

Ground.

7

VREG

Regulated Input Supply to the LDO Amplifier. Bypass VREG to GND with a 1 μF or greater capacitor. Do not

connect a load to ground.

8

VIN

Regulator Input Supply. Bypass VIN to GND with a 4.7 μF or greater capacitor.

EP

Exposed pad. The exposed pad enhances the thermal performance and is electrically connected to VIN inside the

package. It is recommended that the exposed pad connect to the input voltage plane on the board.