Data Sheet

ADMV8526

REGISTER DETAILS

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Rev. 0 | 23 of 31

Address: 0x013, Reset: 0x00, Name: FAST_LATCH_DIRECTION

Table 21. Bit Descriptions for FAST_LATCH_DIRECTION

Bits

Bit Name

Description

Reset

Access

[7:1]

RESERVED

Reserved.

0x0

R

0

FAST_LATCH_DIRECTION

Fast Latch Direction. This bit determines which direction to sequence within the fast latch lookup

table. When the direction is set to increment, the internal state machine is set to the start index.

When the direction is set to decrement, the internal state machine is set to the stop index.

0x0

R/W

0: increment.

1: decrement.

Address: 0x014, Reset: 0x00, Name: FAST_LATCH_STATE

Table 22. Bit Descriptions for FAST_LATCH_STATE

Bits

Bit Name

Description

Reset

Access

7

RESERVED

Reserved.

0x0

R

[6:0]

FAST_LATCH_STATE

Fast Latch State. Reads back the internal state machine index for fast latch lookup table (SFL mode). This

index is the next location the internal state machine advances to, on the next CS rising edge. The internal

state machine index is set to the start index if the direction is set to increment and is set to the stop index

if the direction set to is decrement. Upon changes to the start index, stop index, and direction, the index

updates accordingly.

0x0

R

Address: 0x020, Reset: 0x00, Name: WR_FC

Table 23. Bit Descriptions for WR_FC

Bits

Bit Name

Description

Reset

Access

[7:0]

FC_LOAD_WR

Write Group: Center Frequency.

0x0

R/W