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FS5502 数据表(PDF) 21 Page - NXP Semiconductors |
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FS5502 数据表(HTML) 21 Page - NXP Semiconductors |
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21 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit 15 14 13 12 11 10 9 8 Write 0 0 0 BUCK1TSD_ M 0 BUCK3TSD_ M LDO1TSD_M 0 Read RESERVED RESERVED RESERVED BUCK1TSD_ M RESERVED BUCK3TSD_ M LDO1TSD_M RESERVED Reset 0 0 0 0 0 0 0 0 Bit Symbol Description Inhibit INTERRUPT for VPRE overcurrent 0 INT not masked 1 INT masked 22 VPREOC_M Reset condition: POR Inhibit INTERRUPT for BUCK1 overcurrent 0 INT not masked 1 INT masked 20 BUCK1OC_M Reset condition: POR Inhibit INTERRUPT for BUCK3 overcurrent 0 INT not masked 1 INT masked 18 BUCK3OC_M Reset condition: POR Inhibit INTERRUPT for LDO1 overcurrent 0 INT not masked 1 INT masked 17 LDO1OC_M Reset condition: POR Inhibit INTERRUPT for BUCK1 overtemperature shutdown event 0 INT not masked 1 INT masked 12 BUCK1TSD_M Reset condition: POR Inhibit INTERRUPT for BUCK3 overtemperature shutdown event 0 INT not masked 1 INT masked 10 BUCK3TSD_M Reset condition: POR Inhibit INTERRUPT for LDO1 overtemperature shutdown event 0 INT not masked 1 INT masked 9 LDO1TSD_M Reset condition: POR Table 18. M_INT_MASK1 register bit description FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 21 / 113 |
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