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ADA4098-1BUJZ-R5 数据表(PDF) 23 Page - Analog Devices

部件名 ADA4098-1BUJZ-R5
功能描述  50 V, 1 MHz, 165 關A per Channel, Robust, Over-The-Top, Precision Op Amps
PDF  33 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4098-1BUJZ-R5 数据表(HTML) 23 Page - Analog Devices

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Data Sheet
ADA4098-1/ADA4098-2
APPLICATIONS INFORMATION
analog.com
Rev. A | 23 of 33
LARGE RESISTOR GAIN OPERATION
The ADA4098-1 and ADA4098-2 have approximately 4 pF of input
capacitance.
The parallel combination of RF and RG on the inverting input can
combine with this input capacitance (CIN) to form a pole that can
reduce bandwidth, cause frequency response peaking, or produce
oscillations (see Figure 59). To mitigate these consequences, place
a feedback capacitor (CF) with a value of CF > CIN(RG/RF) in paral-
lel with RF for summing node impedances >20 kΩ (RF||RG > 20
kΩ). This capacitor placement cancels the input pole and optimizes
dynamic performance (see Figure 58).
For applications where the noise gain is unity (RG→∞), and the
feedback resistor exceeds 20 kΩ, CF ≥ CIN. Optimize PCB layouts
to keep layout related summing node capacitance to an absolute
minimum.
Figure 58. Inverting Gain Schematic
Figure 59. Inverting Gain of 1, Small Signal Frequency Response, RF = RG =
100 kΩ
RECOMMENDED VALUES FOR VARIOUS
GAINS
Table 9 is a reference for determining various recommended gains
and associated noise performance. The total impedance seen at
the inverting input is kept to <20 kΩ for gains >1 to maintain ideal
small signal bandwidth.
Table 9. Gains and Associated Recommended Resistor Values (TA = 25°C)
Gain RG (kΩ)
RF (kΩ)
CF (pF)
Approximate −3 dB Frequency (MHz)
Total System Noise (nV/√Hz at 1 kHz), Referred to Input
+1
Not applicable
0
Not applicable
1.5
16.5
+2
4.99
4.99
0
0.67
16.9
+2
100
100
3.9
0.56
32.4
+5
4.99
20
0
0.26
18.1
+10
4.99
45.3
0
0.13
17.7
−1
100
100
3.9
0.38
64.8
−1
4.99
4.99
0
0.72
16.9
−2
4.99
10
0
0.45
26.2
−5
4.99
24.9
0
0.22
21.6



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