ADA4622-1ARJZ-R2 datasheet(10/38 Pages) AD

10 / 38 page

ADA4622-1/ADA4622-2/ADA4622-4

Data Sheet

Rev. E | Page 10 of 38

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter

Rating

Supply Voltage

36 V

Input Voltage

(V−) − 0.3 V to

(V+) + 0.2 V

Differential Input Voltage

36 V

Storage Temperature Range

−65°C to +150°C

Operating Temperature Range

−40°C to +125°C

Junction Temperature Range

−65°C to +150°C

Lead Temperature, Soldering (10 sec)

300°C

ESD Rating, Human Body Model (HBM)

4 kV

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Close attention to

PCB thermal design is required.

Table 5. Thermal Resistance1, 2

Package Type

θJA

θJC3

Unit

8-Lead SOIC_N

1-Layer JEDEC Board

N/A

°C/W

2-Layer JEDEC Board

120

N/A

°C/W

8-Lead MSOP

1-Layer JEDEC Board

N/A

115

°C/W

2-Layer JEDEC Board

185

N/A

°C/W

8-Lead LFCSP

1-Layer JEDEC Board

N/A

°C/W

2-Layer JEDEC Board

145

N/A

°C/W

2-Layer JEDEC Board with 2 × 2 Vias

N/A

°C/W

5-Lead SOT-23

1-Layer JEDEC Board

N/A

°C/W

2-Layer JEDEC Board

339

N/A

°C/W

14-Lead SOIC_N

1-Layer JEDEC Board

N/A

°C/W

2-Layer JEDEC Board

N/A

°C/W

16-Lead, 4 × 4 mm LFCSP

1-Layer JEDEC Board

N/A

2.2

°C/W

2-Layer JEDEC Board

N/A

°C/W

Thermal impedance simulated values are based on a JEDEC thermal test

board. See JEDEC JESD51.

N/A means not applicable.

For θJC test, 100 μm thermal interface material (TIM) is used. TIM is assumed

to have 3.6 W/mK.

ESD CAUTION

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