ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

Data Sheet

Rev. E | Page 16 of 19

SHUTDOWN OPERATION

INPUT PIN CHARACTERISTICS

The ADA4691-2 has a classic CMOS logic inverter input for each

shutdown pin, as shown in Figure 56.

P-CHANNEL

N-CHANNEL

INPUT

OUTPUT

Figure 56. CMOS Inverter

With slowly changing inputs, the top transistor and bottom

transistor may be slightly on at the same time, increasing the

supply current. This can be avoided by driving the input with

a digital logic output having fast rise and fall times. Figure 57

through Figure 59 show the supply current for both sections

switching simultaneously with rise times of 1 μs, 10 μs, and 1 ms.

Clearly, the rise and fall times should be faster than 10 μs.

Using an RC time constant to enable/disable shutdown is not

recommended.

TIME (400µs/DIV)

SD A, SD B

DUT OUTPUT

Figure 57. Shutdown Pin Rise Time = 1 μs

TIME (400µs/DIV)

SD A, SD B

DUT OUTPUT

Figure 58. Shutdown Pin Rise Time = 10 μs

TIME (400µs/DIV)

SD A, SD B

DUT OUTPUT

Figure 59. Shutdown Pin Rise Time = 1 ms

INPUT THRESHOLD

The input threshold is approximately 1.2 V above the V− pin when

operating on ground and 5 V and 0.9 V when operating on 2.7 V

(see Figure 60 and Figure 61). The threshold is relatively stable

over temperature. For operation on split supplies, the logic swing

may have to be level shifted.

500

450

400

350

300

250

200

150

100

50

0

05.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

SD VOLTAGE (V)

ADA4691-2

300

250

200

150

100

50

0

02.7

2.4

2.1

1.8

1.5

1.2

0.9

0.6

0.3

SD VOLTAGE (V)

ADA4691-2