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ADA4691-2ACPZ-R7 数据表(PDF) 15 Page - Analog Devices |
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ADA4691-2ACPZ-R7 数据表(HTML) 15 Page - Analog Devices |
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15 / 19 page ![]() Data Sheet ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 Rev. E | Page 15 of 19 ADA4692-2 VSY = ±1.35V RL = 2kΩ TA = 25°C TIME (1µs/DIV) 200mV/DIV 10mV/DIV ERROR BAND Figure 51. Positive Settling Time to 0.1% TIME (1µs/DIV) 200mV/DIV 10mV/DIV ERROR BAND ADA4692-2 VSY = ±1.35V RL = 2kΩ TA = 25°C Figure 52. Negative Settling Time to 0.1% –80 –90 –100 –110 –120 –130 –140 100 1k 10k 100k FREQUENCY (Hz) ADA4692-2 VSY = ±2.5V VIN = 2.8V p-p AV = +1 TA = 25°C V– V+ V– V+ U2 R2 1kΩ R1 100kΩ 6 7 5 V+ V– V+ V– 0 0 0 0 + – VIN R3 600Ω U1 2 3 CS (dB) = 20 log (VOUT/100 = VIN) Figure 53. Channel Separation (CS) vs. Frequency TIME (1µs/DIV) 1V/DIV 20mV/DIV ERROR BAND ADA4692-2 VSY = ±2.5V RL = 2kΩ TA = 25°C Figure 54. Positive Settling Time to 0.1% TIME (1µs/DIV) 1V/DIV 20mV/DIV ERROR BAND ADA4692-2 VSY = ±2.5V RL = 2kΩ TA = 25°C Figure 55. Negative Settling Time to 0.1% |
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