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PI3DPX1202A

Document number: DS40115 Rev 3-3

PI3DPX1202A

AUX ACK 00218h to 0027Fh

AUX ACK 00201h

AUX write 00260h:

Sink Test request response

Source-side Aux

Sink-side Aux

Enable Test registers (bit[0] = 1)

Do nothing (bit[1] = 1)

Aux reply 00201h

Aux ACK 00201h:

Automated Test Request

Aux read 00218h-0027F:

Test request

Aux reply 00218h

Aux reply 00260h

Figure 4-6: Sink Test Request Transaction in Aux Link Training

A complete two way AUX transaction is defined as one of the following

AUX write and Sink issue ACK reply:

From Source

Sync Start/Start Pattern

4-bit cmd 1000 20-bit address

From Sink ACK

Sync Start bit

00000000

Stop

AUX write and Sink issue NACK reply:

A data byte “M” must follow AUX NACK, “M” indicates the number of data bytes successfully written. When a Source Device is

writing a DPCD address not supported by the Sink Device, the Sink Device shall reply with AUX NACK and “M” equal to zero.

From Source

Sync

Start bit

4-bit cmd 1000 20-bit adr

8-bit length Data Stop

From Sink NACK

Sync

Start bit

00010000

8-bit data byte M Stop