Data Sheet

ADM7150

Capacitor Properties

Any good quality ceramic capacitors can be used with the

ADM7150 as long as they meet the minimum capacitance

and maximum ESR requirements. Ceramic capacitors are

manufactured with a variety of dielectrics, each with different

behavior over temperature and applied voltage. Capacitors must

have a dielectric adequate to ensure the minimum capacitance

over the necessary temperature range and dc bias conditions.

X5R or X7R dielectrics with a voltage rating of 6.3 V to 50 V

are recommended. However, Y5V and Z5U dielectrics are

not recommended due to their poor temperature and dc bias

characteristics.

Figure 56 depicts the capacitance vs. dc bias voltage of a 1206,

10 µF, 10 V, X5R capacitor. The voltage stability of a capacitor is

strongly influenced by the capacitor size and voltage rating. In

general, a capacitor in a larger package or higher voltage rating

exhibits better stability. The temperature variation of the X5R

dielectric is ~±15% over the −40°C to +85°C temperature range

and is not a function of package or voltage rating.

DC BIAS VOLTAGE (V)

10

0

4

8

2

6

0

12

10

8

6

4

2

Figure 56. Capacitance vs. DC Bias Voltage

Use Equation 1 to determine the worst-case capacitance

accounting for capacitor variation over temperature,

component tolerance, and voltage.

(1)

where:

TEMPCO is the worst-case capacitor temperature coefficient.

TOL is the worst-case component tolerance.

In this example, the worst-case temperature coefficient

(TEMPCO) over −40°C to +85°C is assumed to be 15% for an

X5R dielectric. The tolerance of the capacitor (TOL) is assumed

Substituting these values in Equation 1 yields

Therefore, the capacitor chosen in this example meets the

minimum capacitance requirement of the LDO over

temperature and tolerance at the chosen output voltage.

To guarantee the performance of the ADM7150, it is imperative

that the effects of dc bias, temperature, and tolerances on the

behavior of the capacitors be evaluated for each application.

ENABLE (EN) AND UNDERVOLTAGE LOCKOUT

(UVLO)

The ADM7150 uses the EN pin to enable and disable the VOUT

pin under normal operating conditions. As shown in Figure 57,

when a rising voltage on EN crosses the upper threshold, VOUT

turns on. When a falling voltage on EN crosses the lower threshold,

VOUT turns off. The hysteresis varies as a function of the input

voltage. For example, the EN hysteresis is approximately 200 mV

with an input voltage of 4.5 V.

1.6

1.5

1.0

1.2

1.4

1.1

1.3

0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

VOUT_EN_RISE

VOUT_EN_FALL

16

+125°C

+25°C

–40°C

14

12

10

8

6

1.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

Temperatures

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