ADM7151

Data Sheet

Rev. B | Page 6 of 24

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

3

BYP

4

GND

1

VREG

2

VOUT

6REF

5 REF_SENSE

8VIN

7EN

ADM7151

TOP VIEW

(Not to Scale)

NOTES

1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE.

EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS

ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE.

CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON

THE BOARD TO ENSURE PROPER OPERATION.

Figure 3. 8-Lead LFCSP Pin Configuration

ADM7151

TOP VIEW

(Not to Scale)

VIN

8

EN

7

REF

6

REF_SENSE

5

NOTES

1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE.

EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS

ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE.

CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON

THE BOARD TO ENSURE PROPER OPERATION.

Figure 4. 8-Lead SOIC Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VREG

Regulated Input Supply to LDO Amplifier. Bypass VREG to GND with a 10 μF or greater capacitor. Do not connect a

load to ground.

2

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a 10 μF or greater capacitor.

3

BYP

Low Noise Bypass Capacitor. Connect a 1 μF capacitor to GND to reduce noise. Do not connect a load to ground.

4

GND

Ground Connection.

5

REF_SENSE

6

REF

Low Noise Reference Voltage Output. Bypass REF to GND with a 1 μF capacitor. Short REF_SENSE to REF for fixed

output voltages. Do not connect a load to ground.

7

EN

Enable. Drive EN high to turn on the regulator and drive EN low to turn off the regulator. For automatic startup,

connect EN to VIN.

8

VIN

Regulator Input Supply. Bypass VIN to GND with a 10 μF or greater capacitor.

EP

EP

Exposed Pad on the Bottom of the Package. Exposed pad enhances thermal performance and is electrically

connected to GND inside the package. Connect the exposed pad to the ground plane on the board to ensure

proper operation.