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ADM7150ACPZ-4.5-R7 数据表(PDF) 15 Page - Analog Devices

部件名 ADM7150ACPZ-4.5-R7
功能描述  800 mA Ultralow Noise, High PSRR, RF Linear Regulator
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADM7150ACPZ-4.5-R7 数据表(HTML) 15 Page - Analog Devices

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Data Sheet
ADM7150
THEORY OF OPERATION
The ADM7150 is an ultralow noise, high power supply rejection
ratio (PSRR) linear regulator targeting radio frequency (RF)
applications. The input voltage range is 4.5 V to 16 V, and it can
deliver up to 800 mA of output current. Typical shutdown current
consumption is 0.1 µA at room temperature.
Optimized for use with 10 µF ceramic capacitors, the ADM7150
provides excellent transient performance.
VREG
GND
VOUT
VIN
EN
REF
REF_SENSE
REFERENCE
SHUTDOWN
ACTIVE
RIPPLE
FILTER
SHORT CIRCUIT,
THERMAL
PROTECT
OTA
E/A
BYP
Figure 51. Simplified Internal Block Diagram
Internally, the ADM7150 consists of a reference, an error amplifier,
and a P-channel MOSFET pass transistor. Output current is
delivered via the PMOS pass device, which is controlled by the
error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate of
the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
By heavily filtering the reference voltage, the ADM7150 is able
to achieve 1.7 nV/√Hz output typical from 10 kHz to 1 MHz.
Because the error amplifier is always in unity gain, the output
noise is independent of the output voltage.
To maintain very high PSRR over a wide frequency range, the
ADM7150 architecture uses an internal active ripple filter. This
stage isolates the low output noise LDO from noise on VIN.
The result is that the PSRR of the ADM7150 is significantly
higher over a wider frequency range than any single stage LDO.
The ADM7150 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. When EN is high, VOUT
turns on, and when EN is low, VOUT turns off. For automatic
startup, EN can be tied to VIN.
VREG
VIN
REF_SENSE
REF
OUT
BYP
GND
EN
18V
6V
6V
6V
6V
6V
6V
6V
6V
18V
18V
Figure 52. Simplified ESD Protection Block Diagram
The ESD protection devices are shown in the block diagram as
Zener diodes (see Figure 52).
Rev. 0 | Page 15 of 24



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