Data Sheet

ADM8611/ADM8612/ADM8613/ADM8614/ADM8615

Rev. G | Page 13 of 17

MANUAL RESET INPUT

The ADM8611, ADM8612, ADM8613, and ADM8615 feature a

manual reset input (MR). Drive MR low to assert the reset output.

When MR transitions from low to high, the reset remains asserted

for the duration of the reset timeout period before deasserting.

The MR input has a 600 kΩ internal pull-up resistor so that the

input is always high when unconnected. To drive the MR input,

use an external signal or a push-button switch to ground; debounce

circuitry is integrated on-chip for this purpose. Noise immunity is

provided on the MR input, and fast, negative going transients of

up to 0.4 μs (typical) are ignored. If required, a 0.1 μF capacitor

between the MR pin and ground provides additional noise

immunity.

Figure 28. Manual Reset Timing

WATCHDOG TIMER

The ADM8613/ADM8614/ADM8615 feature a watchdog timer

that monitors microprocessor activity. A timer circuit is cleared

with every low to high or high to low logic transition on the watch-

dog input pin (WDI), which detects pulses as short as 85 ns. If

a RESET output is asserted. The microprocessor must toggle the

WDI pin to avoid being reset. Failure of the microprocessor to

toggle the WDI pin within the timeout period indicates a code

execution error, and the reset pulse generated restarts the

microprocessor in a known state.

In addition to logic transitions on WDI, the watchdog timer

is also cleared by a reset assertion caused by an undervoltage

condition on the VCC pin, WDT_SEL toggling, or MR being

pulled low. When RESET is asserted, the watchdog timer is

cleared and does not begin counting again until the RESET

output is deasserted. The watchdog timer can be disabled by

driving the watchdog disable input (WD_DIS) high.

Figure 29. Watchdog Timer Timing

WATCHDOG TIMEOUT SELECT INPUT

Pulling the watchdog timeout select input (WDT_SEL) on the

ADM8614 high allows the device to extend its watchdog timeout

period from 1.6 sec (typical) to 100 sec (typical). This function

allows processors to have a long initialization time during startup.

The long timeout period also enables the processor to stay in

low power mode for a long period and work only intermittently,

reducing overall system power consumption.

TYPICAL APPLICATION CIRCUITS

Figure 30. ADM8611 Typical Application Circuit

Figure 31. ADM8612 Typical Application Circuit

Figure 32. ADM8613 Typical Application Circuit

Figure 33. ADM8614 Typical Application Circuit

VCC

RESET

MR

MR EXTERNALLY

DRIVEN LOW

0V

0V

WDI

RESET

ADM8611

MICROPROCESSOR

VCC

GND

RESET

RESET

MR

3.3V

ADM8612

MICROPROCESSOR

VCC

GND

RESET

INPUT

MR

3.3V

VIN

0.8V

ADM8613

MICROPROCESSOR

VCC

WD_DIS

WDI

GND

RESET

MR

RESET

2.5V

OUTPUT

ADM8614

VCC

WD_DIS

WDT_SEL

WDI

GND

RESET

RESET

2.5V

OUTPUT

OUTPUT

OUTPUT

MICROPROCESSOR