SiC530

www.vishay.com

Vishay Siliconix

S20-0486-Rev. C, 29-Jun-2020

2

Document Number: 62940

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

PINOUT CONFIGURATION

Fig. 2 - SiC530 Pin Configuration

PIN DESCRIPTION

PIN NUMBER

NAME

FUNCTION

1

ZCD_EN#

ZCD, PS4 control. Active low

Supply voltage for internal logic circuitry

23

Analog ground for the driver IC

3

N.C.

No connection

4

BOOT

High-side driver bootstrap voltage

5

PHASE

Return path of high-side gate driver

6 to 8, 25

Power stage input voltage. Drain of high-side MOSFET

9 to 11, 17, 18, 20, 26

Power ground

12 to 16

Switch node of the power stage

19, 24

GL

Low-side gate signal

21

Supply voltage for internal gate driver

22

PWM

PWM control input

ORDERING INFORMATION

PART NUMBER

PACKAGE

MARKING CODE

SiC530CD-T1-GE3

SiC530

5 V PWM optimized

SiC530DB

Reference board

1

2

3

4

5

ZCD_EN#

V

CIN

N.C.

BOOT

PHASE

16

15

14

13

12

V

SWH

V

SWH

V

SWH

V

SWH

V

SWH

11

10

9

8

7

6

17

18

19

20

21

22

P

GND

26

V

IN

25

C

GND

23

GL

24